The present invention relates to semiconductor devices and fabrication process thereof and more particularly to a semiconductor device having a ferroelectric capacitor and a fabrication process thereof.
Intensive efforts are being made for developing a ferroelectric random access memory (FeRAM), wherein a ferroelectric random access memory is a semiconductor memory device that holds information in a ferroelectric capacitor by utilizing polarization of a ferroelectric film. A ferroelectric memory is non-volatile in that it holds the information even when electric power supplied thereto is turned off and thus attracts much attention in view of the possibility of realizing a memory device of high density integration, high speed driving, high durability and low electric power consumption.
For the material of the ferroelectric film that constitutes the ferroelectric capacitor, a ferroelectric oxide having a perovskite crystal structure characterized by a large residual dielectric polarization of 10–30 μC/cm2, such as PZT (Pb(Zr,Ti)O3), SBT (SrBi2Ta2O9), and the like, is used.
With such a ferroelectric film, it has been known that the characteristics of the ferroelectric material are deteriorated when moisture has penetrated from outside via an interlayer insulation film such as silicon oxide film, which has high affinity to water.
More specifically, water thus penetrated into the semiconductor device undergoes decomposition into hydrogen and oxygen during the high temperature semiconductor process used at the time of formation of the interlayer insulation film or metal wiring patterns, while the hydrogen atoms thus formed cause formation of oxygen defects in the ferroelectric film as a result of causing reaction with oxygen in the ferroelectric film. Thereby, crystallinity of the ferroelectric film is degraded. A similar phenomenon is caused also by prolonged use of the ferroelectric memory. As a result, there occurs degradation of performance in the ferroelectric capacitor such as decrease of the residual dielectric polarization or decrease of the dielectric constant. Further, there occur also the cases in which the performance of the transistors and other devices is degraded.
In order to deal with such degradation of the ferro electric capacitor, there has been proposed an IC chip that uses a water-blocking guard ring that prevents penetration of water to the IC chip. Reference should be made to Japanese Laid-Open Patent Publication 2000-277465.
FIG. 1A shows such a conventional IC chip 100 in a plan view while FIG. 1B shows the IC chip of FIG. 1A in a cross-sectional view taken along an A–A′ line of FIG. 1A.
Referring to FIGS. 1A and 1B, the IC chip 100 is constructed on a semiconductor substrate 101 and includes a circuit part 104 in which there is formed a transistor 102 and a ferroelectric capacitor 103. The circuit part 104 is covered with an interlayer insulation film 105 of silicon oxide, and the like, formed on the semiconductor substrate 101, while there is provided an water-blocking guard ring 108 on the peripheral part 106 of the IC chip 100 surrounding the circuit part 104 such that the water-blocking guard ring 108 extends from the surface of the semiconductor substrate 101 to a passivation film 111. Further, there is a proposal not illustrated to provide a guard ring of a metal film on a sidewall surface 105 of the interlayer insulation film exposed as a result of the dicing process at the time of dicing the individual IC chips from a semiconductor wafer. Such a water-blocking guard ring 108 blocks the moisture penetrating from the sidewall surface 109 and hence the degradation of the ferroelectric capacitor caused by the wager penetrating into the circuit part 104.